merge conflicts and STATIC_ASSERT

This commit is contained in:
uosfz 2025-03-15 18:46:16 +01:00
commit 66fc225733
Signed by: uosfz
SSH key fingerprint: SHA256:FlktuluyhTQg3jHZNLKwxOOC5hbfrUXM0tz3IA3lGJo
6 changed files with 46 additions and 27 deletions

View file

@ -50,4 +50,6 @@ void printf(const char *format, ...);
__attribute__ ((noreturn)) __attribute__ ((noreturn))
void panic(const char *file, unsigned int line, const char *msg); void panic(const char *file, unsigned int line, const char *msg);
#define STATIC_ASSERT(expr) _Static_assert(expr)
#endif // KARLOS_UTILITY_H #endif // KARLOS_UTILITY_H

View file

@ -47,9 +47,7 @@ void print_virtio_blk_bars() {
if (pci_search(0x1AF4, 0x1001, &bdf) && pci_search(0x1AF4, 0x1042, &bdf)) { if (pci_search(0x1AF4, 0x1001, &bdf) && pci_search(0x1AF4, 0x1042, &bdf)) {
PANIC("couldn't find virtio_blk device!"); PANIC("couldn't find virtio_blk device!");
} }
puts("found virtio_blk device at bdf "); printf("found virtio_blk device at bdf %X16.\n", bdf);
putu16x(bdf);
printf(".\n");
// read BARs // read BARs
for (int i = 0; i < 6; i++) { for (int i = 0; i < 6; i++) {
struct pci_bar_desc desc = pci_bar_desc_read(bdf, i); struct pci_bar_desc desc = pci_bar_desc_read(bdf, i);
@ -63,8 +61,7 @@ void check_initrd() {
for (uint64_t off = 0; off < bootboot.initrd_size; off++) { for (uint64_t off = 0; off < bootboot.initrd_size; off++) {
uint8_t byte = ((uint8_t*)bootboot.initrd_ptr)[off]; uint8_t byte = ((uint8_t*)bootboot.initrd_ptr)[off];
putu8x(byte); printf("%X8 ", byte);
putc(' ');
if (++printed_in_line % 32 == 0) { if (++printed_in_line % 32 == 0) {
printed_in_line = 0; printed_in_line = 0;
@ -122,9 +119,7 @@ void _start() {
struct tar_header hd; struct tar_header hd;
int res = tar_get_file("hello.txt", &hd); int res = tar_get_file("hello.txt", &hd);
ASSERT(res == 1); ASSERT(res == 1);
puts(hd.name); printf("%s %X32\n", hd.name, hd.size);
putu32x(hd.size);
putln();
for (uint64_t i = 0; i < hd.size; i++) { for (uint64_t i = 0; i < hd.size; i++) {
putc(((char *)hd.data)[i]); putc(((char *)hd.data)[i]);
} }

View file

@ -33,8 +33,8 @@ void pci_config_write_u32(uint16_t bdf, uint8_t offset, uint32_t value) {
struct pci_bar_desc pci_bar_desc_read(uint16_t bdf, uint8_t barnum) { struct pci_bar_desc pci_bar_desc_read(uint16_t bdf, uint8_t barnum) {
ASSERT(barnum < 6); ASSERT(barnum < 6);
// get basic information // get basic information
// https://en.wikipedia.org/wiki/PCI_configuration_space // https://en.wikipedia.org/wiki/PCI_configuration_space
uint8_t offset = 0x10 + (barnum << 2); uint8_t offset = 0x10 + (barnum << 2);
uint32_t bar = pci_config_read_u32(bdf, offset); uint32_t bar = pci_config_read_u32(bdf, offset);
struct pci_bar_desc desc; struct pci_bar_desc desc;
@ -48,8 +48,8 @@ struct pci_bar_desc pci_bar_desc_read(uint16_t bdf, uint8_t barnum) {
desc.address = bar & 0xfffffffc; desc.address = bar & 0xfffffffc;
} }
// get length // get length
// https://stackoverflow.com/questions/19006632/how-is-a-pci-pcie-bar-size-determined // https://stackoverflow.com/questions/19006632/how-is-a-pci-pcie-bar-size-determined
pci_config_write_u32(bdf, offset, 0xffffffff); pci_config_write_u32(bdf, offset, 0xffffffff);
bar = pci_config_read_u32(bdf, offset); bar = pci_config_read_u32(bdf, offset);
desc.length = (~(bar & 0xfffffff0)) + 1; desc.length = (~(bar & 0xfffffff0)) + 1;

View file

@ -304,6 +304,32 @@ void printf(const char *format, ...) {
putu64x((uint64_t)(intptr_t)ptr); putu64x((uint64_t)(intptr_t)ptr);
break; break;
} }
case 'X': {
char size1 = *(++format);
ASSERT(size1 != '\0');
if (size1 == '8') {
uint8_t val = (uint8_t)va_arg(args, int);
putu8x(val);
break;
}
char size2 = *(++format);
ASSERT(size2 != '\0');
if (size1 == '1' && size2 == '6') {
uint16_t val = (uint16_t)va_arg(args, int);
putu16x(val);
break;
} else if (size1 == '3' && size2 == '2') {
uint32_t val = (uint32_t)va_arg(args, int);
putu32x(val);
break;
} else if (size1 == '6' && size2 == '4') {
uint64_t val = (uint64_t)va_arg(args, long long);
putu64x(val);
break;
} else {
PANIC("printf: invalid X size");
}
}
case '%': { case '%': {
putc('%'); putc('%');
break; break;

View file

@ -48,7 +48,7 @@ struct lapic {
struct lapic_register reserved4[1]; struct lapic_register reserved4[1];
}; };
static_assert(sizeof (struct lapic) == 0x400); STATIC_ASSERT(sizeof (struct lapic) == 0x400);
static struct lapic *lapic = (struct lapic *)PHYS_TO_IDMAPPED(LAPIC_BASE); static struct lapic *lapic = (struct lapic *)PHYS_TO_IDMAPPED(LAPIC_BASE);

View file

@ -9,14 +9,12 @@ void write_segment_descriptor(uint64_t *entry, uint8_t dpl, uint8_t executable)
| (dpl << 5) | (1 << 4) // S | (dpl << 5) | (1 << 4) // S
| (executable << 3) | (0 << 2) // DC | (executable << 3) | (0 << 2) // DC
| (1 << 1) // RW | (1 << 1) // RW
| (0 << 0) // A | (0 << 0); // A
;
uint8_t flags = (1 << 3) // G uint8_t flags = (1 << 3) // G
| (0 << 2) // DB | (0 << 2) // DB
| (1 << 1) // L | (1 << 1) // L
| (0 << 0) // reserved | (0 << 0); // reserved
;
*entry = 0xffff // limit *entry = 0xffff // limit
| ((uint64_t)0x0000 << 16) // base | ((uint64_t)0x0000 << 16) // base
@ -24,8 +22,7 @@ void write_segment_descriptor(uint64_t *entry, uint8_t dpl, uint8_t executable)
| ((uint64_t)access_byte << 40) // access byte | ((uint64_t)access_byte << 40) // access byte
| ((uint64_t)0xf << 48) // limit | ((uint64_t)0xf << 48) // limit
| ((uint64_t)flags << 52) // flags | ((uint64_t)flags << 52) // flags
| ((uint64_t)0x00 << 56) // base | ((uint64_t)0x00 << 56); // base
;
} }
#define CODE_SEGMENT 1 #define CODE_SEGMENT 1
@ -44,11 +41,12 @@ void init_gdt() {
__asm__("lgdt (%0)" ::"r"(gdtr)); __asm__("lgdt (%0)" ::"r"(gdtr));
__asm__("mov %0, %%ds" ::"r"(DATA_SEGMENT << 3)); __asm__("mov %0, %%ds" ::"r"(DATA_SEGMENT << 3));
// TODO set code segment -> iret?
// TODO set code segment -> iret?
} }
__attribute__ ((packed)) struct __attribute__((packed))
struct int_desc_entry { int_desc_entry {
uint16_t offset1; uint16_t offset1;
uint16_t selector; uint16_t selector;
uint8_t ist; uint8_t ist;
@ -64,8 +62,7 @@ struct int_desc_entry {
void write_segment_selector(uint16_t *ss, uint16_t index) { void write_segment_selector(uint16_t *ss, uint16_t index) {
*ss = (uint16_t)PRIV_KERNEL *ss = (uint16_t)PRIV_KERNEL
| 0 // use GDT | 0 // use GDT
| (index << 3) | (index << 3);
;
} }
#define GATE_TYPE_INTERRUPT 0xe #define GATE_TYPE_INTERRUPT 0xe
@ -75,9 +72,8 @@ void write_int_desc_entry(struct int_desc_entry *e, uint64_t offset) {
write_segment_selector(&e->selector, CODE_SEGMENT); write_segment_selector(&e->selector, CODE_SEGMENT);
e->ist = 0; e->ist = 0;
e->attr = (uint8_t)GATE_TYPE_INTERRUPT e->attr = (uint8_t)GATE_TYPE_INTERRUPT
| (uint8_t)(PRIV_KERNEL << 5) | (uint8_t)(PRIV_KERNEL << 5)
| (uint8_t)(1 << 7) // present | (uint8_t)(1 << 7); // present
;
e->offset2 = (uint16_t) ((offset >> 16) & 0xffff); e->offset2 = (uint16_t) ((offset >> 16) & 0xffff);
e->offset3 = (uint32_t) ((offset >> 32) & 0xffffffff); e->offset3 = (uint32_t) ((offset >> 32) & 0xffffffff);
e->pad = 0; e->pad = 0;