diff --git a/x86_64-efi/bootnetboot.c b/x86_64-efi/bootnetboot.c
index d89f521..86183c4 100644
--- a/x86_64-efi/bootnetboot.c
+++ b/x86_64-efi/bootnetboot.c
@@ -1427,13 +1427,12 @@ VOID EFIAPI bootboot_startcore(IN VOID* buf)
         "movq %%cr4, %%rax;"
         "orw $3 << 8, %%ax;"
         "mov %%rax, %%cr4"
-        : );
+        : : : "rax", "memory", "cc");
 
     // set up paging
     __asm__ __volatile__ (
-        "mov %0, %%rax;"
-        "mov %%rax, %%cr3"
-        : : "b"(paging) : "memory" );
+        "mov %0, %%cr3"
+        : : "a"(paging) : "memory");
 
     // set stack and call _start() in sys/core
     __asm__ __volatile__ (
@@ -1444,7 +1443,7 @@ VOID EFIAPI bootboot_startcore(IN VOID* buf)
         "pushq %1;"
         "movq %2, %%rdi;"
         "retq"
-        : : "a"((UINTN)core_num*initstack), "b"(entrypoint), "c"((UINTN)core_num) : "memory" );
+        : : "a"((UINTN)core_num*initstack), "b"(entrypoint), "c"((UINTN)core_num) : "rdi", "memory" );
 }
 
 /**
@@ -1520,14 +1519,14 @@ efi_main (EFI_HANDLE image, EFI_SYSTEM_TABLE *systab)
         "cpuid;"
         "shrl $24, %%ebx;"
         "mov %%bx,%0"
-        : "=b"(bootboot->bspid) : : );
+        : "=r"(bootboot->bspid) : : "eax", "ebx", "ecx", "edx", "cc");
     Print(L"LINE %d\n", (int)__LINE__ );
 #endif
 
 #if !defined(USE_MP_SERVICES) || !USE_MP_SERVICES
     // should be no need to check for RDSTC, available since Pentium, therefore
     // all long mode capable CPUs should have it. But just to be on the safe side
-    __asm__ __volatile__ ("mov $1, %%eax; cpuid;" : "=d"(a) : : );
+    __asm__ __volatile__ ("mov $1, %%eax; cpuid;" : "=d"(a) : : "eax", "ebx", "ecx");
     Print(L"LINE %d\n", (int)__LINE__ );
     if(a & (1<<4)) {
         // calibrate CPU clock cycles
@@ -1549,7 +1548,7 @@ efi_main (EFI_HANDLE image, EFI_SYSTEM_TABLE *systab)
                             __asm__ __volatile__ ( "rdtsc" : "=a"(a),"=d"(b)); currtime=((UINT64)b << 32)|a; \
                         } while(currtime < endtime); \
                     } else \
-                        __asm__ __volatile__ ("1: pause; dec %%ecx; or %%ecx, %%ecx; jnz 1b" : : "c"(n*1000) : "memory"); \
+                        __asm__ __volatile__ ("1: pause; dec %%ecx; jecxnz 1b" : : "c"(n*1000) : "cc", "memory"); \
                 } while(0)
 #define send_ipi(a,m,v) do { \
     while(*((volatile uint32_t*)(lapic_addr + 0x300)) & (1 << 12)) __asm__ __volatile__ ("pause" : : : "memory"); \
@@ -1941,7 +1940,7 @@ get_memory_map:
         __asm__ __volatile__ (
             "movb $0xFF, %%al; outb %%al, $0x21; outb %%al, $0xA1;"             // disable PIC
             "inb $0x70, %%al; orb $0x80, %%al; outb %%al, $0x70;"               // disable NMI
-            : : :);
+            : : : "eax", "cc");
 
 #if !defined(USE_MP_SERVICES) || !USE_MP_SERVICES
         // green dot on the top left corner (do not allow gcc to rearrange this!!!)
@@ -1954,12 +1953,12 @@ get_memory_map:
 
             // copy trampoline and save UEFI's 64 bit system registers for the trampoline code
             __asm__ __volatile__ (
-                "movq $32, %%rcx; movq %0, %%rsi; movq $0x8000, %%rdi; repnz movsq;"
+                "movq $32, %%rcx; movq $0x8000, %%rdi; repnz movsq;"
                 "movq %%cr3, %%rax; movq %%rax, 0x80C0;"
                 "movl %%cs, %%eax; movl %%eax, 0x80CC;"
                 "movl %%ds, %%eax; movl %%eax, 0x80D0;"
-                "movq %%rbx, 0x80D8;"
-                "sgdt 0x80E0;" : : "d"((uint64_t)&ap_trampoline), "b"((uint64_t)&bootboot_startcore) : );
+                "movq %1, 0x80D8;"
+                "sgdt 0x80E0;" : : "S"((uint64_t)&ap_trampoline), "r"((uint64_t)&bootboot_startcore) : "rax", "rcx", "rdi", "memory");
 
             // enable Local APIC
             *((volatile uint32_t*)(lapic_addr + 0x0D0)) = (1 << 24);