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Initializing host state

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This commit is contained in:
Thomas Oltmann 2025-03-11 02:06:12 +01:00
parent fb720ed106
commit f374da687b
4 changed files with 104 additions and 24 deletions
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20
include/x86/gdt.h Normal file
View file

@ -0,0 +1,20 @@
#ifndef _VISOR_GDT_H_
#define _VISOR_GDT_H_
#include <stdint.h>
__attribute__ ((packed))
struct GDTR {
uint16_t limit;
uint64_t base;
};
static inline struct GDTR
storegdt(void)
{
struct GDTR gdtr;
__asm__ ("sgdt %0\n\t" : "=m"(gdtr));
return gdtr;
}
#endif

20
include/x86/idt.h Normal file
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@ -0,0 +1,20 @@
#ifndef _VISOR_IDT_H_
#define _VISOR_IDT_H_
#include <stdint.h>
__attribute__ ((packed))
struct IDTR {
uint16_t limit;
uint64_t base;
};
static inline struct IDTR
storeidt(void)
{
struct IDTR idtr;
__asm__ ("sidt %0\n\t" : "=m"(idtr));
return idtr;
}
#endif

7
include/x86/msr.h
View file

@ -19,9 +19,10 @@
#define IA32_VMX_CR4_FIXED1 0x489
#define IA32_VMX_VMCS_ENUM 0x48A
#define IA32_EFER 0xC0000080
#define IA32_FS_BASE 0xC0000100
#define IA32_GS_BASE 0xC0000101
#define IA32_EFER 0xC0000080
#define IA32_FS_BASE 0xC0000100
#define IA32_GS_BASE 0xC0000101
#define IA32_KERNEL_GS_BASE 0xC0000102
static inline uint32_t
readmsr32(uint32_t msr)

81
src/vintel.c
View file

@ -5,6 +5,8 @@
#include <cpuid.h>
#include <x86/msr.h>
#include <x86/cr.h>
#include <x86/idt.h>
#include <x86/gdt.h>
#include <x86/vmx.h>
#include "virt.h"
@ -97,25 +99,61 @@ vintel_init_guest(void)
vmwrite(GUEST_SYSENTER_EIP, readmsr64(0x176));
}
#if 0
#define HOST_ES_SELECTOR 0xC00
#define HOST_CS_SELECTOR 0xC02
#define HOST_SS_SELECTOR 0xC04
#define HOST_DS_SELECTOR 0xC06
#define HOST_FS_SELECTOR 0xC08
#define HOST_GS_SELECTOR 0xC0A
#define HOST_TR_SELECTOR 0xC0C
#define HOST_CR0 0x6C00
#define HOST_CR3 0x6C02
#define HOST_CR4 0x6C04
#define HOST_RSP 0x6C14
#define HOST_RIP 0x6C16
#define HOST_IA32_PAT 0x2C00
#define HOST_IA32_EFER 0x2C02
#define HOST_FS_BASE 0x6C06
#define HOST_GS_BASE 0x6C08
#define HOST_TR_BASE 0x6C0A
#define HOST_SYSENTER_CS 0x4C00
#define HOST_SYSENTER_ESP 0x6C10
#define HOST_SYSENTER_EIP 0x6C12
#define HOST_GDTR_BASE 0x6C0C
#define HOST_IDTR_BASE 0x6C0E
#if 1
static void
vintel_init_host(void)
{
#if 0
// Read TR
trBase.LowPart = ((trItem[0] >> 16) & 0xFFFF) | ((trItem[1] & 0xFF) << 16) | ((trItem[1] & 0xFF000000) >> 8);
trBase.HighPart = trItem[2];
#endif
uint64_t trBase = 0x0;
uint64_t trSelector = 0x0;
uint64_t hostSP = 0x0;
uint64_t hostIP = 0x0;
// Set TR
vmwrite(HOST_TR_BASE, trBase.QuadPart);
vmwrite(HOST_TR_BASE, trBase);
vmwrite(HOST_TR_SELECTOR, trSelector);
// Set segment selectors
vmwrite(HOST_ES_SELECTOR, AsmReadES() & 0xfff8);
vmwrite(HOST_CS_SELECTOR, AsmReadCS() & 0xfff8);
vmwrite(HOST_SS_SELECTOR, AsmReadSS() & 0xfff8);
vmwrite(HOST_DS_SELECTOR, AsmReadDS() & 0xfff8);
vmwrite(HOST_FS_SELECTOR, AsmReadFS() & 0xfff8);
vmwrite(HOST_GS_SELECTOR, AsmReadGS() & 0xfff8);
vmwrite(HOST_ES_SELECTOR, reades() & 0xfff8);
vmwrite(HOST_CS_SELECTOR, readcs() & 0xfff8);
vmwrite(HOST_SS_SELECTOR, readss() & 0xfff8);
vmwrite(HOST_DS_SELECTOR, readds() & 0xfff8);
vmwrite(HOST_FS_SELECTOR, readfs() & 0xfff8);
vmwrite(HOST_GS_SELECTOR, readgs() & 0xfff8);
// Set control registers
vmwrite(HOST_CR0, readcr0());
@ -123,23 +161,23 @@ vintel_init_host(void)
vmwrite(HOST_CR4, readcr4());
// Set RSP and RIP
vmwrite(HOST_RSP, (ULONG64)pVcpu->VmxHostStackBase);
vmwrite(HOST_RIP, HostEip);
vmwrite(HOST_RSP, hostSP);
vmwrite(HOST_RIP, hostIP);
// Set MSRs
vmwrite(HOST_IA32_PAT, __readmsr(IA32_MSR_PAT));
vmwrite(HOST_IA32_EFER, __readmsr(IA32_MSR_EFER));
vmwrite(HOST_FS_BASE, __readmsr(IA32_FS_BASE));
vmwrite(HOST_GS_BASE, __readmsr(IA32_GS_KERNEL_BASE));
vmwrite(HOST_IA32_SYSENTER_CS, __readmsr(0x174));
vmwrite(HOST_IA32_SYSENTER_ESP, __readmsr(0x175));
vmwrite(HOST_IA32_SYSENTER_EIP, __readmsr(0x176));
vmwrite(HOST_IA32_PAT, readmsr64(IA32_PAT));
vmwrite(HOST_IA32_EFER, readmsr64(IA32_EFER));
vmwrite(HOST_FS_BASE, readmsr64(IA32_FS_BASE));
vmwrite(HOST_GS_BASE, readmsr64(IA32_KERNEL_GS_BASE));
vmwrite(HOST_SYSENTER_CS, readmsr64(0x174));
vmwrite(HOST_SYSENTER_ESP, readmsr64(0x175));
vmwrite(HOST_SYSENTER_EIP, readmsr64(0x176));
// Set GDT and IDT
GdtTable idtTable;
__sidt(&idtTable);
vmwrite(HOST_GDTR_BASE, gdtTable.Base);
vmwrite(HOST_IDTR_BASE, idtTable.Base);
struct GDTR gdtr = storegdt();
struct IDTR idtr = storeidt();
vmwrite(HOST_GDTR_BASE, gdtr.base);
vmwrite(HOST_IDTR_BASE, idtr.base);
}
#endif
@ -186,6 +224,7 @@ vintel_enable(void)
Print(L"VMPTRLD Status: %p\n", (void *)status);
vintel_init_guest();
vintel_init_host();
}
struct virt_vtable virt_vtable_intel = {